>
Fa   |   Ar   |   En
   Reconfigurable VBSME Architecture Using RBSAD  
   
نویسنده Olivares Joaquın
منبع journal of universal computer science - 2012 - دوره : 18 - شماره : 2 - صفحه:264 -285
چکیده    This paper presents an architecture which is capable of processing variable block size motion estimation (vbsme) and which is able to apply pixel precision reduction techniques in a reconfigurable way. the design has been carried out by using online arithmetic, which allows to process all motion vectors of a block in just one iteration. the system has been implemented on fpga and just requires 7724 slices, reaching a performance of 55 4cif frames per second (fps) in full precision and of 72 with 4 bit precision. results for different search areas 31×31, 32×32, and 46×46 are presented. using 4bit precision real time processing for hdtvp is achieved. thanks to the reduced cost and high performance, this architecture is perfect for mobile devices.
کلیدواژه Video ,High-Speed Arithmetics ,Parallel Architectures ,Special-Purpose and Application-Based Systems
آدرس University of Cordoba, Spain
پست الکترونیکی olivares@uco.es
 
     
   
Authors
  
 
 

Copyright 2023
Islamic World Science Citation Center
All Rights Reserved