SET-BASED DYNAMIC CACHE PARTITIONING ON CHIP MULTIPROCESSORS

Today, most of the chip multiprocessor architectures utilize a shared last level cache to reduce the off-chip memory delay. benefit from such a cache may be very limited due to cache conflicts caused by applications running in parallel. in the literature, there are numerous studies that try to reduce cache conflicts by partitioning this cache level and allocating dedicated cache areas to each application. these studies generally focus on policies dedicating an appropriate number of ways to each core. there has also been recent studies suggesting set-based cache partitioning. set-based partitioning has a number of advantages over way-based partitioning. this study aims to improve the processor performance by using a mechanism to dynamically partition the cache based on sets. the resizing decisions for partitions are made according to statistics collected at periodic intervals.