A Novel Approach for Low Phase Noise Voltage Controlled Oscillator Design based on TSMC 0.18 um Technology

In this paper, a new structure of voltage control oscillator (vco) to reduce the phase noise using two plans of a variable voltage capacitor is proposed. the aim of the current paper is to analyse two structure of a completely integrated 3.7 ghz lc-vco based on tsmc 0.18 um technology. in the first plan for different voltages with variable voltage capacitors in this circuit can be achieved to a suitable phase noise of about 125 db per hz and in the second plan, a noise of -123 db per hz is achieved in the deviation frequency of 1 mhz. also, the figure of merit (fom) values for the first plan of -4/186 and for the second plan of –4/184 are achieved and the power consumption is 10 mw.