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Groebner bases based verification solution for SystemVerilog concurrent assertions
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نویسنده
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zhou n. ,gao x. ,wu j. ,wei j. ,li d.
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منبع
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journal of applied mathematics - 2014 - دوره : 2014 - شماره : 0
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چکیده
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We introduce an approach exploiting the power of polynomial ring algebra to perform systemverilog assertion verification over digital circuit systems. this method is based on groebner bases theory and sequential properties checking. we define a constrained subset of svas so that an efficient polynomial modeling mechanism for both circuit descriptions and assertions can be applied. we present an algorithm framework based on the algebraic representations using groebner bases for concurrent svas checking. case studies show that computer algebra can provide canonical symbolic representations for both assertions and circuit designs and can act as a novel solver engine from the viewpoint of symbolic computation. © 2014 ning zhou et al.
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آدرس
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school of computer and information technology,beijing jiaotong university,beijing 10044,china,school of electronic and information engineering,lanzhou jiaotong university, China, g and s labs,school of software,dalian university of technology, China, school of computer and information technology,beijing jiaotong university,beijing 10044,china,guangxi key laboratory of hybrid computation and ic design analysis,guangxi university for nationalities, China, g and s labs,school of software,dalian university of technology, China, g and s labs,school of software,dalian university of technology, China
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Authors
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