a novel method design multiplexer quaternary with cntfet

Background and objectives: in recent decades, due to the effect of the short channel, the use of cmos transistors in the nanoscale has become a major concern. one option to deal with this issue is the use of nano-transistors. methods: using nano-transistors and multi-valued logic (mvl) can reduce the level of chips and connections and have a direct impact on power consumption. the present study reports the design of a new method of multiplexers (muxs) based on quaternary logic and transistors of carbon nanotubes (cntfet) and having a new look at the layout and use of muxs. results: the use of special rotary functions and unary operators in quaternary logic in the design of muxs reduced the number of cntfets from 27% to 54%. also, the use of muxs in the adder structure resulted in a 54% reduction in power delay product (pdp) and a 17.5% to 85.6% reduction in cntfet counts. conclusion: the simulated results display a significant improvement in the fabrication of adders, average power consumption, speed, and pdp compared to the current best-performing techniques in the literature. the proposed operators and circuits were evaluated under various operating conditions. the results show the stability of the proposed circuits.