design of a low-latency router based on virtual output queuing and bypass channels for wireless network-on-chip

Wireless network-on-chip (winoc) is considered as a novelapproach for designing future multi-core systems. in winocs, wirelessrouters (wrs) utilize high-bandwidth wireless links to reduce thetransmission delay between the long distance nodes. when the networktraffic loads increase, a large number of packets will be sent into the wiredand wireless links and can easily fill fifo queues at the input ports ofrouters. in these conditions, head-of-line (hol) blocking and nodecongestion may occur and the network communications efficiencytremendously decreases. in this study, a low-latency router was proposed,which employs virtual output queuing (voq) and bypass channels toeliminate the congestion of routers and improves network performance.synthetic traffic patterns were simulated using noxim simulator andobtained results show that considerable improvement in the latency, totalenergy consumption and the saturation throughput can be achievedcompared to the other winocs.