A hybrid mapping algorithm for reconfigurable nanoarchitectures

Nanotechnology is emerging as one of the most promising alternative technology to cmos technology because of its higher density,high speed,lighter,and lower power consumption; however,defects are much higher in nanotechnology. therefore,the need for defect-tolerance techniques becomes crucial in nanotechnology. this paper addresses an important intractable problem of finding a maximum size defect-free sub-crossbar in defective nano-scale crossbars for a higher yield. we propose a hybrid mapping algorithm by embedding known greedy heuristics with genetic algorithm (ga) to search a large solution space effectively. the proposed algorithm exploits the degrees of nodes,which play a crucial role in the selection mechanism in the greedy mapping heuristics to generate a better quality solution. in the proposed algorithm,ga provides the selection order by generating a new set of degrees that are used by the greedy mapping heuristic to find a new value for the defect-free sub-crossbar (k). the experimental results demonstrate the effectiveness of the proposed hybrid algorithm in finding a large size defect-free sub-crossbar compared to the existing state-of-theart greedy heuristics.