ASIC design of natural frequency of ECG signal for atrial fibrillation detection module using high-level synthesis approach

The growth of interest in the development of reduced-scale electrocardiogram (ecg) system based on field-programmable gated-array (fpga) design platform is increasing. this study provides initial result of mapping digital signal processing to hardware design for specific purpose. in this paper,a part of digital signal processing for atrial fibrillation classification was implemented to register-transfer level (rtl) design. the specific part was feature extraction of ecg signal. the algorithm of ecg signal feature extraction was natural frequency from second-order system for detecting atrial fibrillation. by applying high-level synthesis method,three designs were implemented for natural frequency behavior. the designs were two single-cycle (design 1 and design 2) and multi-cycle fully-constraint (design 3),of which logic utilization consist of 2530,36 and 1,respectively. performance evaluation among all designs were compared. © 2015 penerbit utm press. all rights reserved.