High Gain of 3.1-5.1 GHz CMOS power amplifier for direct sequence ultra-wideband application

This paper presents the design a power amplifier (pa) for direct sequence ultra-wideband applications using 0.13 μm cmos technology operating in a low band frequency of 3.1 ghz to 5.1 ghz. current-reused technique is employed at the first stage to increase the gain at the upper end of the desired band. cascaded common source configuration with shunt peaking inductor at the second stage helps to enhance the wideband frequency while increasing the gain approximately twice the performance. the simulation results specify that high gain of 20.3 db with � 0.8 db flatness,group delay variation of �121.3 ps,and good input return loss and output return loss is obtained over desired working band. the proposed pa achieves power consumption of 27.3 mw.