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Electrical test of resistive and capacitive open defects at data bus in 3D memory IC
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نویسنده
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hashizume m. ,shiraishi y. ,yotsuyanagi h. ,yokoyama h. ,tada t. ,lu s.-k.
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منبع
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journal of telecommunication, electronic and computer engineering - 2017 - دوره : 9 - شماره : 3-2 - صفحه:39 -42
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چکیده
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We propose an electrical test method of resistive and capacitive open defects occurring at data bus lines between dies,and between dies and i/o pins in 3d memory ics. the test method is based on supply current of an ic. the number of test vectors for a 3d memory ic made of nd memory dies in the test method is 10∙nd and small. also,defective interconnects are located by the test method. feasibility of the tests is examined by some experiments for a circuit made of an sram ic on a printed circuit board. the experimental results show that capacitive open defects and resistive open ones whose resistance values are greater than 200ω can be detected by the test method.
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کلیدواژه
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3D memory IC; Data bus; Open defect; Supply current test
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آدرس
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tokushima university,tokushima, Japan, tokushima university,tokushima, Japan, tokushima university,tokushima, Japan, akita university,akita, Japan, tokushima bunri university,shido,kagawa, Japan, national taiwan univ. of science and technology,taipei, Taiwan
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Authors
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