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   reference spur suppression in the integer-n frequency synthesizers by reducing periodic ripples amplitude on the vco control voltage  
   
نویسنده jahangirzadeh s. ,amirabadi a. ,farrokhi a.
منبع مهندسي برق دانشگاه تبريز - 2021 - دوره : 51 - شماره : 1 - صفحه:61 -69
چکیده    To achieve a low reference spur for an integern frequency synthesizer, a new spur reducing technique was proposed. to reduce the size of periodic ripples on the vco control voltage, the low pass filter, and the charge pump were added with a spur reduction system.  by lowering the amplitude of the periodic ripple on the vco control voltage, we managed to lower the reference spur. the introduced technique removes the necessity to decrease bandwidth and cvo gain reference spur suppressing. to demonstrate the effectiveness of the proposed structure, a 2.06 – 2.22 ghz frequency synthesizer was used and the 180nm cmos technology was used for postlayout simulation. the proposed frequency synthesizer represents the reference spur of 85.84 dbc at 20 mhz offset and phase noise of 108dbc/hz at 200 khz offset frequency also it is locked after 2.8us while occupied 0.35 mm^2 of the chip area.
کلیدواژه spur suppression ,reference spur ,voltage controlled oscillator (vco) ,and integer-n frequency synthesizer
آدرس islamic azad university, south tehran branch, department of electrical engineering, iran, islamic azad university, south tehran branch, department of electrical engineering, iran, islamic azad university, south tehran branch, department of electrical engineering, iran
پست الکترونیکی ali_farrokhi@azad.ac.ir
 
   Reference spur suppression in the Integer-N frequency synthesizers by reducing periodic ripples amplitude on the VCO control voltage  
   
Authors Jahangirzadeh S. ,Amirabadi A. ,Farrokhi A.
Abstract    To achieve a low reference spur for an IntegerN frequency synthesizer, a new spur reducing technique was proposed. To reduce the size of periodic ripples on the VCO control voltage, the low pass filter, and the charge pump were added with a spur reduction system.  By lowering the amplitude of the periodic ripple on the VCO control voltage, we managed to lower the reference spur. The introduced technique removes the necessity to decrease bandwidth and CVO gain reference spur suppressing. To demonstrate the effectiveness of the proposed structure, a 2.06 – 2.22 GHz frequency synthesizer was used and the 180nm CMOS technology was used for postlayout simulation. The proposed frequency synthesizer represents the reference spur of 85.84 dBc at 20 MHz offset and phase noise of 108dBc/Hz at 200 kHz offset frequency also it is locked after 2.8us while occupied 0.35 mm2 of the chip area.
Keywords Spur suppression ,reference spur ,voltage controlled oscillator (VCO) ,and integer-N frequency synthesizer
 
 

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