improved performance analysis and design of dual metal gate finfet for low power digital applications

A high-k dielectric dual metal gate finfet (dmg-finfet) is proposed in this work to improve the drain current and electrical characteristics of the device. the proposed device employing dielectric materials such as silicon dioxide, hafnium oxide and titanium oxide and investigated in 10 nm technology. the architecture represents a critical advancement in transistor design, addressing challenges posed by traditional high-k gate dielectric materials being hfo2 and tio2. this work employs a comprehensive approach, incorporating simulation techniques to evaluate the performance metrics of dmg finfet. this investigation encompasses key aspects being transistor characteristics, power consumption, and reliability. this high-k dielectric (hfo2) dual material gate –finfet device achieving improved performance parameters such as ion= 32.12 ma, ioff= 33 μa, gm(max) = 0.045 s, gds(max) = 0.024 s and ron(max) = 32.87 kω. therefore this work is suitable for designing high performance devices with high-k dielectric materials being hfo2 and tio2.  the impact of dual metal gate materials on ion, ioff, gm (max), gds(max) and ron(max) is calculated and improved 64% compared to conventional device.