modified second order generalized integrator-frequency locked loop grid synchronization for single phase grid tied system tuning and experimentation assessment

The phase-locked loop (pll) is applied in grid-tied systems to synchronise converter operation with grid voltage, affecting converter stability and performance. synchronous reference frame pll (srfpll) is a popular grid synchronisation method due to its simplicity and reliability. normal srf-pll cannot suppress dc offset, causing basic frequency and phase oscillations.when a grid is irregular, its bandwidth should be reduced to ensure acceptable disturbance rejection without sacrificing detection speed. to enhance the phase-angle estimation speed and accuracy, the researchers modified structure by adding the pre/in-loop filter in advanced plls.the capacity to deliver improved dynamic response and reduced settling time without compromising system stability or the ability to eliminate disturbances is a major issue for plls. among different control methods, sogi-fll (second-order generalised integrator-based frequency locked loop) had the best performance. it tracks grid voltage frequency precisely even when there is harmonics,voltage variations, frequency fluctuations, etc. in the event of a dc offset, the calculated frequency incorporates low frequency oscillations. a modified second-order generalised integrator frequency-locked loop (msogi-fll) is presented in this work to address grid voltage anomalies of all types, including dc offset. using the waijung block-set of matlab/simulink, a modified sogi-fll is realized and evaluated by applying abnormal grid voltage situations using a low-cost dsp-based stm32f407vgt microcontroller. the results demonstrate msogi-better fll's performance in harsh circumstances.