A Low-Voltage, Low-Power, Two-Stage Amplifier for Switched-Capacitor Applications in 90 nm CMOS Process

A novel low-voltage two-stage operational amplifier employing resistive biasing is presented. this amplifier implements neutralization and correction common mode stability in second stage while employs capacitive dc level shifter and coupling between two stages. the structure reduces the power consumption and increases output voltage swing. the compensation is performed by simple miller method. for each stage an independent commonmode feedback circuits has been used. simulation results show that power consumption is 2.1 mw at 1 v supply. the dc gain of the amplifier is about 70 db while its output swing is as high as around 1.2 v.