implementation of n-inputs ternary to binary converter with multipart division technique based on cntfet

In this paper, the new structure n×m (n-ternary inputs and m-binary outputs) ternary to binary converter based on the carbone nanao tube field effect transistor is presented. the carbone nanao tube field effect transistor (cntfet) has special properties such as controlled threshold voltage. the aforementioned advantages related to the multi-level (more specifically ternary) circuits and systems based on cntfet technology have encouraged researchers to put more effort into on their design and realization in recent years. the encoder (one input- five outputs), 3×1 multiplexer (one input – one selector-three outputs), and special adder blocks (full adder and half adder) are base blocks that are implemented by transistor level using special properties of cntfet transistor. in general, to implement a n-input ternary-to-binary converter, the number of inputs can be divided into two small converters, and also a ternary-to-binary converter can be designed for each input. in this paper, 2×4, 3×5, 4×7 and 5×8 ternary to binary converters are designed and simulated by hospice and 32 nanometer technology. the result of the simulation is shown that the 5×8 ternary to binary converter has 1.89 µw dc-power and 52 ps propagation delay. the proposed 5×8 ttbc converter is implemented by 365 cntfet transistors and divided into two ternary to binary converters.